DMA / Invalidate / Flush

Flush: write back the contents of cache to main memory
Invalidate: mark cache lines as invalid so that future reads go to main memory.
Dirty: mark DMA memory region "dirty", so that CPU will invalidate the region

DDR memory -> HW buffer:
1. Flush DDR memory (no flush on HW buffer needed because it's not cacheable)
2. Invalidate DDR memory (so no cache line used during DMA)

https://stackoverflow.com/questions/7132284/dma-cache-coherence-management